A Survey of Research on Global Placement and Route Algorithm of Very Large Scale Integration

doi:10.11871/jfdc.issn.2096-742X.2026.03.011

Abstract

Abstract:

[Background] Very Large Scale Integration (VLSI) physical design is a core problem in Electronic Design Automation (EDA). With the continuous growth of chip scale, placement and routing algorithms have also evolved accordingly. [Methods] This paper systematically classifies and summarizes research on global placement and global routing in VLSI from two perspectives: the design objects and the underlying algorithmic strategies. In addition, recent trends in applying machine learning to placement and routing are analyzed. [Conclusions] The combination of analytical algorithms and machine learning methods has become an important development trend in placement and routing. Future work should focus on further enhancing the parallelism of algorithms.

Key words: VLSI, EDA, physical design, global placement, global routing

LI Xu,LI Chen,JIANG Jinrong,LU Zhonghua,CHI Xuebin. A Survey of Research on Global Placement and Route Algorithm of Very Large Scale Integration[J]. Frontiers of Data and Computing, 2026, 8(3): 122-136.

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参考文献	布局方法	GPU加速	布线驱动	时序驱动	布局器
[14]	划分式	否	否	否	Copa
[15][16]	启发式	否	否	否	TimerWolf
[22]	解析式	否	否	否	NTUPlace
[23]	解析式	否	否	否	ePlace
[24-28]	解析式	是	是	是	DREAMPlace
[31]	解析式	是	是	是	DREAM-GAN
[34]	解析式	是	否	否	Xplace
[37]	解析式	否	否	否	RePlAce
[41]	解析式	否	是	否	PUFFER
[46]	解析式	是	是	是	Autoplace
[47]	解析式	否	否	否	ePlace-MS
[49]	解析式	否	否	否	Pplace
[50]	解析式	是	否	否	SkyPlace